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Deep Learning on Edge Computing Devices

Design Challenges of Algorithm and Architecture

  • 1st Edition - February 2, 2022
  • Latest edition
  • Authors: Xichuan Zhou, Haijun Liu, Cong Shi, Ji Liu
  • Language: English

Deep Learning on Edge Computing Devices: Design Challenges of Algorithm and Architecture focuses on hardware architecture and embedded deep learning, including neural networ… Read more

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Description

Deep Learning on Edge Computing Devices: Design Challenges of Algorithm and Architecture focuses on hardware architecture and embedded deep learning, including neural networks. The title helps researchers maximize the performance of Edge-deep learning models for mobile computing and other applications by presenting neural network algorithms and hardware design optimization approaches for Edge-deep learning. Applications are introduced in each section, and a comprehensive example, smart surveillance cameras, is presented at the end of the book, integrating innovation in both algorithm and hardware architecture. Structured into three parts, the book covers core concepts, theories and algorithms and architecture optimization.

This book provides a solution for researchers looking to maximize the performance of deep learning models on Edge-computing devices through algorithm-hardware co-design.

Key features

  • Focuses on hardware architecture and embedded deep learning, including neural networks
  • Brings together neural network algorithm and hardware design optimization approaches to deep learning, alongside real-world applications
  • Considers how Edge computing solves privacy, latency and power consumption concerns related to the use of the Cloud
  • Describes how to maximize the performance of deep learning on Edge-computing devices
  • Presents the latest research on neural network compression coding, deep learning algorithms, chip co-design and intelligent monitoring

Readership

Computer scientists and researchers in applied informatics, Artificial Intelligence, data science, Cloud computing, networking, and information technology; Researchers in hardware design, deep learning, and optimization; Engineers working on Edge or embedded AI or deep learning applications

Table of contents

PART 1. INTRODUCTION

1. Introduction

1.1 Background

1.1.1 Deep Learning Background

1.1.2 Applications of Deep Learning on Edge Device

1.2 Architecture and Taxonomy

1.3 Measurements of Performance

1.4 Objectives and Contribution

1.5 Outline of the Book

PART 2. THEORY AND ALGORITHM

2. Model Inference on Edge Device

2.1 Background and Challenges

2.2 Agile Network Architectures

2.3 Model Distillation

2.4 Pruning and Quantization
- Automatic Neural Network Compression by Sparsity-Quantization Joint Learning: A Constrained Optimization-based Approach, CVPR 2020
- Model Compression with Adversarial Robustness: A Unified Optimization Framework, NIPS 2019
- ECC: Energy Constrained Deep Neural Network Compression via a Bilinear Regression Model, CVPR 2019
- Energy-Constrained Compression for Deep Neural Networks via Weighted Sparse Projection and Layer Input Masking, ICLR 2019

2.5 Applications

3. Model Training on Edge Device

3.1 Privacy Preserving Challenges

3.2 Distributed Learning / Federated Learning Approach: Asynchronization, Centralization and Decentralization
- Asynchronous Parallel Stochastic Gradient for Nonconvex Optimizations, NIPS 2015
- Xiangru Lian, Huan Zhang, Cho-Jui Hsieh, Yijun Huang, and Ji Liu, NIPS 2016
- Can Decentralized Algorithms Outperform Centralized Algorithms? A Case Study for Decentralized Parallel Stochastic Gradient Descent, NIPS 2017

3.4 Communication efficient algorithms
- DoubleSqueeze: Parallel Stochastic Gradient Descent with Double-Pass Error-Compensated Compression, ICML 2019
- Gradient sparsification for communication-efficient distributed optimization, NIPS 2018
- Central server free federated learning over single-sided trust social networks, 2019

3.5 Applications for Mobile Neural Computing

4. Network Encoding and Quantization

4.1 Background and Challenges

4.2 Rate Distortion Theory and Sparse Encoding

4.3 Bit Bottleneck Quantization Methods

4.4 Application for Efficient Image Classification

PART 3. ARCHITECTURE OPTIMIZATION

5. DANoC: An Algorithm and Hardware Codesign Prototype

5.1 Background and Challenges

5.2 Algorithm Design and Optimization

5.3 Near-Memory Computing Architecture

5.4 Applications of Deep Adaptive Network on Chip

6. Ensemble Spiking Networks on Edge Device

6.1 Background and Challenges

6.2 Ensemble Spiking Neural Computing Model

6.3 Architecture Design and Optimization

6.4 Performance

7. SenseCamera: A Learning Based Multifunctional Smart Camera Prototype

7.1 Challenges beyond Pattern Recognition

7.2 Compressive Convolutional Network Model

7.3 Hardware Implementation and Optimization

Product details

  • Edition: 1
  • Latest edition
  • Published: February 7, 2022
  • Language: English

About the authors

XZ

Xichuan Zhou

Xichuan Zhou is Professor and Vice Dean in the School of Microelectronics and Communication Engineering, at Chongqing University, China. He received his PhD from Zhejiang University. His research focuses on embedded neural computing, brain-like sensing, and pervasive computing. He has won professional awards for his work, and has published over 50 papers.
Affiliations and expertise
Professor, School of Microelectronics and Communication Engineering, Chongqing University, Chongqing, China; Vice Dean, School of Microelectronics and Communication Engineering, Chongqing University, Chongqing, China

HL

Haijun Liu

Research Assistant, School of Microelectronics and Communication Engineering, Chongqing University, Chongqing, China. He received his B.Eng, M.Eng and Ph.D degree from University of Electronic Science and Technology of China in 2011, 2014 and 2019, and has been a visiting scholar of Kyoto University from 2018 to 2019. His main research interests include manifold learning, metric learning, deep learning, subspace clustering and sparse representation in computer vision and machine learning, with focuses on human action detection and recognition, face detection and recognition, person detection and re-identification, remote sensing image processing, and medical image analysis.
Affiliations and expertise
Research Assistant, School of Microelectronics and Communication Engineering, Chongqing University, Chongqing, China

CS

Cong Shi

Cong Shi is a Research Professor in the School of Microelectronics and Communication Engineering, at Chongqing University, China. He received his PhD from Tsinghua University and has held the position of Postdoctoral Fellow with the Schepens Eye Research Institute, at Harvard Medical School. His research focuses on AI-based visual processing system-on-chips, and algorithm hardware co-design techniques. He has published over 30 papers.
Affiliations and expertise
Research Professor, School of Microelectronics and Communication Engineering, Chongqing University, Chongqing, China

JL

Ji Liu

Ji Liu is the Head of the AI platform department and the director of the Seattle AI lab for Kwai Inc. He has previously been a faculty member in computer science at the University of Rochester, USA. He received his PhD from the University of Wisconsin-Madison. His research includes machine learning, optimization, computer vision, reinforcement learning, and other areas. He has published over 100 papers.
Affiliations and expertise
Head, AI Platform Department, Seattle AI Lab, Kwai Inc., Seattle, Washington, United States of America; Director, Seattle AI Lab, Kwai Inc., Seattle, Washington, USA

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