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Durable Phase-Change Memory Architectures

  • 1st Edition, Volume 118 - February 21, 2020
  • Latest edition
  • Editors: Marjan Asadinia, Hamid Sarbazi-Azad
  • Language: English

Advances in Computers, Volume 118, the latest volume in this innovative series published since 1960, presents detailed coverage of new advancements in computer hardware, software,… Read more

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Description

Advances in Computers, Volume 118, the latest volume in this innovative series published since 1960, presents detailed coverage of new advancements in computer hardware, software, theory, design and applications. Chapters in this updated release include Introduction to non-volatile memory technologies, The emerging phase-change memory, Phase-change memory architectures, Inter-line level schemes for handling hard errors in PCMs, Handling hard errors in PCMs by using intra-line level schemes, and Addressing issues with MLC Phase-change Memory.

Key features

  • Gives a comprehensive overlook of new memory technologies, including PCM
  • Provides reliability features with an in-depth discussion of physical mechanisms that are currently limiting PCM capabilities
  • Covers the work of well-known authors and researchers in the field
  • Includes volumes that are devoted to single themes or subfields of computer science

Readership

Researchers from academic and industry studying high-performance computing and storage systems, and hardware manufacturers producing systems requiring high-performance memory systems

Table of contents

1. Introduction to Non-volatile Memory Technologies
Marjan Asadinia and Hamid Sarbazi-Azad

2. The Emerging Phase-change Memory
Marjan Asadinia and Hamid Sarbazi-Azad

3. Phase-change Memory Architectures
Marjan Asadinia and Hamid Sarbazi-Azad

4. Tolerating More Hard Errors in PCMs
Marjan Asadinia and Hamid Sarbazi-Azad

5. Improving the Lifetime of Worn-out Blocks
Marjan Asadinia and Hamid Sarbazi-Azad

6. Addressing Issues with MLC Phase-change Memory
Marjan Asadinia and Hamid Sarbazi-Azad

Product details

  • Edition: 1
  • Latest edition
  • Volume: 118
  • Published: February 24, 2020
  • Language: English

About the editors

MA

Marjan Asadinia

Marjan Asadinia received her Ph.D. degree in computer engineering from Sharif University of Technology, Tehran, Iran, in 2016. During the Ph.D., she worked on Phase Change Memories at HPCAN laboratory. She then acquired a research associate position in the Department of Computer Science at Oregon State University working on advanced technologies for non-volatile memories. She is currently a postdoctoral fellow at the University of Arkansas, Computer Science and Engineering Department. Her research interests include NoC, high-performance computer architecture, and new memory technologies.
Affiliations and expertise
University of Arkansas, USA

HS

Hamid Sarbazi-Azad

Hamid Sarbazi-Azad is currently a professor of computer science and engineering at Sharif University of Technology, and a research professor of computer science at the Institute for Research in Fundamental Sciences, both in Tehran, Iran . His research interests include high-performance computer/memory architectures, NoCs and SoCs, learning architectures,, social networks, and storage systems, on which he has published over 400 refereed papers. He received Khwarizmi International Award in 2006, TWAS Young Scientist Award in engineering sciences in 2007, and Sharif University Distinguished Researcher awards in years 2004, 2007, 2008, 2010 and 2013. He is now an associate editor of ACM Computing Surveys, IEEE Computer Architecture Letters, and Elsevier’s Computers and Electrical Engineering.
Affiliations and expertise
Sharif University of Technology, Tehran, Iran

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